1. Field of the Invention
The present invention relates to a semiconductor device and to a method of fabricating the semiconductor device, and in particular, to the construction of a semiconductor device that can be three-dimensionally stacked and to a method of fabricating the semiconductor device.
2. Description of the Related Art
With the rapid development of Internet technology, prior-art constructions such as mainframes and terminals that are connected to mainframes have been replaced by systems made up by servers that are distributed throughout the world and the high-speed communication lines that connect them.
This information communication network is now rapidly coming into popular use in households and by individuals through inexpensive and highly functional personal computers or mobile telephones that can be connected to the Internet, and as a result, the next-generation Internet protocol (IPv6) will allow connection of all types of electrical household appliances to the Internet. It is desirable that the LSI that is incorporated in these mobile telephones and information electrical appliances be capable, by itself, of various types of processing ranging from information processing and information saving to input/output control. SoC (System on Chip), in which various function blocks are formed on a single LSI chip to realize a high-level multifunctional information processing system, is now receiving increased attention. In actuality, however, the simultaneous formation of various function blocks requiring different forming processes on a silicon wafer is problematic both in terms of design as well as fabrication. There is the additional problem that such LSI lacks flexibility when specifications are to be modified, such as when modifying the design or extending the functionality of each block.
In recent years, SiP (System in Package), in which a plurality of separate LSI are integrated into a package and systemized, has shown great promise as a countermeasure to this problem. In particular, in a package in which each individual LSI is provided as a separate module and then stacked three-dimensionally, each module is first tested to ensure against defects before being integrated. As a result, a higher yield of products that are free of defects and a higher degree of integration through three-dimensional packaging can be obtained than for an SoC in which a large number of functional elements are formed simultaneously or an SiP in which non-modular chips are stacked.